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NXP Semiconductors /LPC18xx /ATIMER /CLR_EN

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Interpret as CLR_EN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLR_EN)CLR_EN 0RESERVED

Description

Interrupt clear enable register

Fields

CLR_EN

Writing a 1 to this bit clears the interrupt enable bit in the ENABLE register.
RESERVED

Reserved.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data